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Develop automation tools for ASIC design and verification - compilers and simulators for hardware description and verification languages. The R&D projects are either internal or part of long-term involvements with top EDA companies. Complete life-cycle of a product is covered, including documentation, unit level testing, maintenance, customer support, quality assurance and infrastructure support. Main activities are focused on research, development and testing of new features, optimizations and bug fixing.

- Graduate Computer Science/Electronics/Mathematics/Physics.
- Strong C/C++ programming skills, at least 3 years experience in software development.
- Good command of software engineering best practices, data structures and algorithms.
- Ability to understand and solve complex technical problems.
- Communicative English.

- Knowledge of compiler development (front-end, parsers, back-end, best practices).
- C/C++ Development under Linux.
- Contact with any of the following: hardware design automation tools (like VCS, Specman, Design Compiler, Synplify, ZeBu, ModelSim, Xilinx etc), digital electronics, hardware description or verification languages (Verilog, VHDL, SystemVerilog, e, other).


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